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Journal of Semiconductors (半导体学报 - 中国科学院半导体研究所)

Authoritative peer-reviewed journal in materials science, metallurgy, chemistry and engineering technologies: Journal of Semiconductors (半导体学报 - Viện Bán dẫn CAS)

Total Research Papers: 120
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Published Research PapersFiltered: Year 2026 • Vol. 32 • 5

Showing 10 of 120 peer-reviewed papers with full Graphical Abstracts.

Original ResearchVol. 32, Issue 5 • pp. 100-112DOI: 10.1088/1674-4926/25120029Jan 15, 2026

Temperature-Dependent Photoluminescence and Carrier Dynamics of CsPbBr3 Quantum Dots: Ligand-Mediated Electron-Phonon Coupling and Trap State Energetics in Solution versus Film

Authors: DONG Zhengda, LI Dachuan, YAN Pingyuan, SHENG Chuanxiang

Temperature-dependent steady-state photoluminescence (PL) and time-resolved PL (TRPL) spectroscopy were employed to quantify the divergent optoelectronic behavior of identical CsPbBr3 quantum dots (QDs) in colloidal solution and thin-film states. The electron-phonon coupling strength in solution is approximately twice that of the film, with average phonon energies extracted from one-photon absorption (OPA) and two-photon absorption (TPA) reaching ~38 meV and ~32 meV in solution, respectively, versus ~22 meV and ~16 meV in the film. Given that the dominant intrinsic phonon mode of CsPbBr3 resides at 18 meV, these elevated energies implicate organic ligand phonons in the radiative recombination pathway of the solution phase. TRPL measurements reveal room-temperature luminescence lifetimes of 22.5 ns (solution) and 5 ns (film), both exhibiting anomalous increases with rising temperature, consistent with thermally activated trap-state carrier release. Fitting yields trap energy levels of ~20 meV in the film and ~4 meV in solution. The deeper traps and reduced electron-phonon coupling in the film are attributed to exciton localization and diminished wavefunction overlap with ligand phonons, a consequence of ligand detachment and inter-QD interactions during film formation. These findings establish ligand morphology as a critical regulator of electron-phonon interactions and non-radiative pathways in CsPbBr3 QDs, providing quantitative design rules for solution-processed optoelectronic devices.

Temperature-Dependent Photoluminescence and Carrier Dynamics of CsPbBr3 Quantum Dots: Ligand-Mediated Electron-Phonon Coupling and Trap State Energetics in Solution versus Film
Graphical Abstract
Original ResearchVol. 32, Issue 5 • pp. 100-112DOI: 10.1088/1674-4926/25080033Jan 15, 2026

A Novel Split Gate and Contact-Field-Plate LDMOS with Enhanced BV–Ron,sp Trade-off and Improved FOM

Authors: Yiting YE, Xiaoyun HUANG, Yixian SONG, Kai XU

A split gate and split contact-field-plate (CFP) LDMOS structure is proposed to improve the breakdown voltage (BV)–specific on-resistance (Ron,sp) trade-off without additional bias voltages, masks, or process steps, ensuring full compatibility with bipolar-CMOS-DMOS (BCD) process flows. Technology computer-aided design (TCAD) simulations elucidate the physical mechanisms: in the on-state, the positively biased split gate forms an accumulation layer at the drift region surface, reducing Ron,sp; in the off-state, the split gate and split CFP introduce additional electric-field peaks that smooth the lateral electric field, preserving high BV. Compared with a conventional CFP-LDMOS, the proposed device achieves an 8.52% reduction in Ron,sp without compromising BV, yielding an 8.07% improvement in the figure of merit (FOM). The structure requires modifications to only four existing masks and can be extended to LDMOS devices across different voltage levels within BCD platforms without structural redesign. These results demonstrate significant potential for power management integrated circuits and automotive electronics, where the Ron,sp–BV trade-off remains a critical bottleneck.

A Novel Split Gate and Contact-Field-Plate LDMOS with Enhanced BV–Ron,sp Trade-off and Improved FOM
Graphical Abstract
Original ResearchVol. 32, Issue 5 • pp. 100-112DOI: 10.1088/1674-4926/26010031Jan 15, 2026

Band Engineering Solar-Blind Ultraviolet Photodetectors: Breaking the Sensitivity-Speed Trade-off

Authors: WANG Hongbin, LI Peng, MA Jiangang

Solar-blind ultraviolet (UV) photodetection in the 200–280 nm spectral window is critical for missile plume detection, corona discharge monitoring, and secure optical communications. Conventional technologies face distinct limitations: photomultiplier tubes offer high sensitivity but are bulky and fragile; silicon-based detectors with external filters suffer from incomplete blocking and high cost; ultra-wide bandgap (UWBG) semiconductors such as AlGaN and Ga2O3 provide intrinsic solar-blind selectivity but photoconductive devices exhibit persistent photoconductivity and slow recovery, while Schottky and heterojunction devices show fast response but insufficient sensitivity due to inefficient charge separation. Unipolar barrier architectures—nBn and pBp—address this trade-off by introducing a high energy barrier for majority carriers to suppress dark current while maintaining near-zero barrier for minority carriers to enable unimpeded photocurrent collection. This review examines recent experimental demonstrations: MgO barrier in Ga2O3-based devices increased reverse breakdown voltage from 31 to 78.1 V, achieving avalanche gain of 5.9 × 10^5 and specific detectivity of 2.33 × 10^16 Jones; ZnO/HfO2/Ga2O3 core@dual-shell heterojunctions with ΔEC = 2.15 eV suppressed dark current from 1.2 × 10^-10 to 7 × 10^-12 A, increased breakdown voltage from 1.9 to 13.7 V, and delivered responsivity of 2.2 × 10^5 A/W, detectivity of 3.1 × 10^16 Jones, and avalanche gain of 4.7 × 10^4; Ga2O3/AlN/AlGaN:Si nBn++ structures with polarization engineering achieved self-powered operation, responsivity of 0.73 A/W, and response rise/decay times of 60 ns/56 µs. These results demonstrate that band engineering—unipolar barriers, bilateral band offset design, and polarization field modulation—decouples sensitivity and speed, establishing a new paradigm for deep-UV sensing.

Band Engineering Solar-Blind Ultraviolet Photodetectors: Breaking the Sensitivity-Speed Trade-off
Graphical Abstract
Original ResearchVol. 32, Issue 5 • pp. 100-112DOI: 10.1088/1674-4926/26020027Jan 15, 2026

Multi-Phase Clock Generation Techniques Toward High-Frequency and Wideband Applications

Authors: Junyan Bi, Hao Xu, Na Yan

Multi-phase clock generation is a critical enabler for high-speed wireline transceivers and millimeter-wave phased-array systems, where phase accuracy, RMS jitter, and PVT robustness directly govern link performance and beam-pointing precision. As data rates exceed 200 Gb/s and carrier frequencies scale toward transistor fT limits, conventional architectures face fundamental bottlenecks. PLL-based divider chains suffer from limited speed, power efficiency, and phase-count scalability, while multi-phase LC oscillators incur substantial area overhead and heightened mismatch sensitivity. Passive phase-shifting networks—coupled-resonator quadrature hybrids and polyphase filters—offer low active power but remain inherently narrowband with insertion loss and process sensitivity. This review examines emerging solutions that decouple frequency generation from phase alignment. DLL-assisted injection-locked ring oscillators provide phase calibration without accumulating phase noise, achieving improved phase uniformity and wider operational bandwidth. DLL architectures with separate quadrature paths relax individual delay-element speed requirements through background calibration, trading system complexity for reduced power. Feedforward-coupled ring oscillators introduce negatively skewed auxiliary delays to accelerate main-inverter switching, demonstrating operation up to 16 GHz in 7-nm FinFET. Cross-coupled ring oscillators using passive networks achieve 20 GHz in 16-nm FinFET, though signal loss along passive paths degrades voltage swing and phase noise. The analysis establishes that explicit decoupling of frequency generation from phase alignment is essential for scaling phase count and operating frequency beyond fT constraints.

Multi-Phase Clock Generation Techniques Toward High-Frequency and Wideband Applications
Graphical Abstract
Original ResearchVol. 32, Issue 5 • pp. 100-112DOI: 10.1088/1674-4926/25120042Jan 15, 2026

Room-temperature electrically injected GaN-based vertical-cavity surface-emitting laser with conductive nanoporous distributed Bragg reflector

Authors: LI Chuanjie, FENG Meixin, LIU Jianping, TIAN Aiqin, LI Xuan, ZHOU Wei, XI Rui, ZHANG Shuming, SUN Qian, YANG Hui

GaN-based vertical-cavity surface-emitting lasers (VCSELs) are constrained by the absence of p-type conductive epitaxial distributed Bragg reflectors (DBRs), forcing reliance on dielectric DBRs that impose high thermal resistance or complex substrate removal. This work demonstrates a room-temperature electrically injected GaN VCSEL incorporating a conductive nanoporous (NP) GaN DBR fabricated by electrochemical etching of alternating n-GaN layers with varying Si doping. The NP-GaN DBR exhibits low electrical resistance, enabling vertical current injection. Under pulsed operation, the device with a 10-μm aperture lases at 427.7 nm with a full width at half maximum (FWHM) of 0.8 nm. The threshold current is 26 mA, corresponding to a threshold current density of approximately 33 kA/cm². Polarization degree increases from 35% below threshold to 86% above threshold, confirming lasing. The turn-on voltage remains high, primarily due to p-side resistance. These results validate the potential of conductive NP-GaN DBRs for high-density two-dimensional VCSEL arrays, though further reduction of p-side resistance is required for continuous-wave operation.

Room-temperature electrically injected GaN-based vertical-cavity surface-emitting laser with conductive nanoporous distributed Bragg reflector
Graphical Abstract
Original ResearchVol. 32, Issue 5 • pp. 100-112DOI: 10.1088/1674-4926/26020026Jan 15, 2026

One-dimensional charged domain walls in fluorite ferroelectrics

Authors: Jiajia Chen, Haoji Qian, Xiaoxi Li, Yan Liu, Chengji Jin, Genquan Han

Ferroelectric domain walls are conventionally treated as two-dimensional (2D) interfaces separating regions of differing polarization. Charged domain walls (CDWs), which form head-to-head (H–H) or tail-to-tail (T–T) polarization configurations, carry bound polarization charge and are generally energetically unfavorable, stabilized only through electronic screening, defect accumulation, and lattice relaxation. Recent work by Zhong et al. (Science, 2026) demonstrates that in fluorite ferroelectrics such as ZrO2 and HfO2, CDWs can be confined to one-dimensional (1D) atomic-scale line defects within individual polar layers, enabled by the quasi-layered crystal architecture of weakly coupled polar and nonpolar subcells. Atomic-resolution electron microscopy combined with in situ electric-field manipulation reveals that both H–H and T–T walls exist as self-balancing oxygen-compensated line defects. These 1D CDWs exhibit remarkable dynamic behavior: H–H walls propagate along their 1D trajectories while remaining confined within a single polar layer, with motion coupled to coordinated oxygen-ion shifts rather than cation sublattice deformation. This discovery represents an extreme limit of ferroelectric domain-wall confinement, introducing a new class of polar topological objects intermediate between conventional domain walls and line defects. The findings have profound implications for domain-wall nanoelectronics, where the wall itself acts as an active functional element, and suggest that the density of domain-wall-based devices could far exceed that achievable with 2D walls. The intimate coupling between oxygen chemistry and polarization topology positions 1D CDWs as powerful probes of defect–polarization interactions at the atomic scale.

One-dimensional charged domain walls in fluorite ferroelectrics
Graphical Abstract
Original ResearchVol. 32, Issue 5 • pp. 100-112DOI: 10.1088/1674-4926/26030014Jan 15, 2026

Supermoiré Domains in Helical Trilayer Graphene

Authors: WANG Wen-Jun, TAN Ping-Heng, ZHANG Xin

Helical trilayer graphene (HTG) with equal twist angles in the same rotational sense has been predicted to reconstruct into triangular domains with opposite Chern numbers, giving rise to topological boundary modes. This work reviews the direct imaging of the supermoiré landscape in HTG using a scanning single-electron transistor (SET) probe that maps local inverse compressibility dμ/dn. The device comprises an HTG stack encapsulated in hexagonal boron nitride (hBN) with a graphite back gate for electrostatic doping. Linecuts of dμ/dn reveal uniform, weakly dispersive incompressible peaks at moiré filling factors ν = ±1 for a twist angle θ ≈ 1.45°, corresponding to a moiré wavelength λM ≈ 10 nm. These peaks indicate that within individual domains the lattice relaxes into a well-ordered moiré pattern. At larger length scales, the interference between multiple moiré patterns produces a supermoiré modulation with period λSM ≈ 380 nm, forming a mosaic of two inequivalent domain types due to local C2z symmetry breaking. The ratio of experimental to theoretical area Aexp/Ath and the strain parameter ε = 1 − cosθ are extracted, providing quantitative metrics for lattice relaxation. The findings establish SET as a powerful tool for characterizing relaxation and topological order in twisted multilayers, with implications for moiré-based quantum devices.

Supermoiré Domains in Helical Trilayer Graphene
Graphical Abstract
Original ResearchVol. 32, Issue 5 • pp. 100-112DOI: 10.1088/1674-4926/26020023Jan 15, 2026

Three-panchromatic organic self-adaptive transistors for in-pixel color correction

Authors: TAN Yuan, DENG Wei, ZHANG Xiujuan, JIE Jiansheng

Machine vision systems suffer from illumination-dependent color shift, a photometric distortion caused by spatially non-uniform, spectrally varying, and temporally dynamic lighting. Conventional white-balance correction is performed post-capture using dedicated image signal processing (ISP) hardware, which introduces substantial computational and memory overhead, increases power consumption and end-to-end latency, and adds hardware complexity unsuitable for resource-constrained or real-time vision systems. Inspired by retinal chromatic adaptation, Di and Zhan et al. proposed a three-panchromatic organic active adaptation transistor (OAAT) that embeds chromatic adaptation directly at the pixel. The device integrates a dual-layer complementary bulk heterojunction into an organic transistor architecture: a PTB7-Th:IEICO-4F blend serves as the adaptive photoresponse layer with broad-spectrum absorption and efficient photogenerated carrier generation, while a PDPP3T:PCBM layer functions as the spectrally compensatory sensing layer. This division of labor preserves panchromatic sensitivity and keeps the adaptation response invariant to blue, green, or red excitation. The PTB7-Th:IEICO-4F layer exhibits highly uniform photogenerated carrier concentration across the visible spectrum, and its trap activation energy is wavelength-insensitive yet decreases monotonically with decreasing light intensity, enabling rapid, stable, intensity-dependent photoadaptation. Increasing luminance activates trapping that compresses photosensitivity, implementing hardware gain control akin to retinal adaptation. The OAAT achieves an active adaptation index exceeding 150 for red, green, and blue light stimuli, indicating robust photoresponse regulation across orders of magnitude in illumination. This paradigm embeds chromatic adaptation and color correction natively within the photosensing pixel, bypassing post-capture computational correction, and establishes a foundational device platform for next-generation intelligent vision systems that perform preprocessing at the sensing frontier. However, the technology remains in its infancy; future efforts must prioritize enhancing long-term operational stability and environmental robustness under thermal, photonic, and bias stress, while rigorously validating adaptive performance in realistic, dynamic illumination environments.

Three-panchromatic organic self-adaptive transistors for in-pixel color correction
Graphical Abstract
Original ResearchVol. 32, Issue 5 • pp. 100-112DOI: 10.1088/1674-4926/26020058Jan 15, 2026

A transferable route to two-dimensional gate-all-around electronics

Authors: WANG Jian, WU Ruiqin, JIANG Jianfeng

The semiconductor industry's transition to gate-all-around (GAA) nanosheet architectures at sub-2 nm nodes represents an incremental evolutionary step for silicon, which confronts fundamental physical limits including power leakage and degraded electrostatic control. A revolutionary path involves integrating atomically thin two-dimensional (2D) semiconductors as channel materials within GAA structures, promising superior electrostatic gate control, lower power consumption, and monolithic 3D integration. However, a scalable, industry-compatible method to synthesize high-quality, uniform 2D semiconductor channels conformally encapsulated by high-k gate dielectrics in a GAA configuration has remained absent. Existing techniques, such as direct deposition of amorphous oxides on 2D materials or mechanical assembly of van der Waals heterostructures, suffer from interfacial defects, poor uniformity, or intrinsic limitations in achieving dual-sided, wafer-scale integration. Peng et al. report a groundbreaking study demonstrating wafer-scale, uniform synthesis of single-crystalline 2D high-k dielectric/semiconductor/high-k dielectric GAA heterostructures via a buffered van der Waals epitaxy technique. The core innovation involves pre-depositing a high-k van der Waals buffer oxide (α-Bi2SeO5) on an industry-standard r-plane sapphire substrate, which mitigates lattice and symmetry mismatch, enabling epitaxial growth of uniform single-crystalline Bi2O2Se films across the entire wafer. Controlled oxidation transforms the top Bi2O2Se layer in situ into β-Bi2SeO5, forming a sandwich-like GAA heterostructure (β-Bi2SeO5/Bi2O2Se/α-Bi2SeO5) with atomically sharp interfaces in a single growth run. Comprehensive characterization confirms exceptional uniformity and crystalline quality over 2-inch wafer areas. The van der Waals gap within the buffer oxide provides a natural cleavage plane, enabling clean exfoliation and transfer of the entire wafer-scale GAA heterostructure onto arbitrary substrates, such as silicon or flexible polymers, while leaving the original sapphire wafer intact and reusable. This decoupling of high-quality crystal growth from final device integration substrate offers a transferable route to 2D GAA electronics.

A transferable route to two-dimensional gate-all-around electronics
Graphical Abstract
Original ResearchVol. 32, Issue 5 • pp. 100-112DOI: 10.1088/1674-4926/26020044Jan 15, 2026

Improved Solvent Systems for the Commercialization of Perovskite Photovoltaic Modules

Authors: Zhaoyang Chu, Xiaotian Hu, Yiwang Chen

Perovskite solar cells (PSCs) offer high power conversion efficiencies (PCE) with low-cost raw materials and versatile fabrication routes, yet commercialization is impeded by reliance on toxic high-boiling-point aprotic polar solvents such as N,N-dimethylformamide (DMF) and N-methyl-2-pyrrolidone (NMP). These solvents pose environmental and health hazards and exhibit slow evaporation kinetics that degrade film quality in high-throughput roll-to-roll slot-die coating. Residual solvent and heterogeneous crystallization introduce high defect densities, undermining long-term stability and compliance with commercial standards. Wang et al. (Science, 2025, 390, 1021–1028) devised an eco-friendly ink formulation using gamma-valerolactone (GVL), dimethylsulfoxide (DMSO), and 2-methyltetrahydrofuran (2-MeTHF), integrated with a solvent-constrained edge-protection (SCEP) strategy. 2-MeTHF, with high vapor pressure and weak coordination to Pb2+, diminishes perovskite–GVL interaction, facilitates GVL evaporation, and enhances interfacial adhesion. Trimethyl-tetradecylammonium chloride (TAC) introduced into the ink broadens the deposition window, suppresses edge defects, and improves film uniformity via a Marangoni effect that balances fluid flow and mitigates rapid solvent evaporation. The approach yielded a 7200 cm2 perovskite photovoltaic module (PPM) with a certified stabilized efficiency of 17.2% by NREL, passing all IEC 61215 reliability standards as certified by TÜV Rheinland. A commercial-scale PPM measuring 120 cm × 60 cm was fabricated, demonstrating the viability of green solvent systems for scalable, high-performance perovskite module production.

Improved Solvent Systems for the Commercialization of Perovskite Photovoltaic Modules
Graphical Abstract