Oxide Semiconductor for Advanced Memory Architectures: Atomic Layer Deposition, Key Requirement and Challenges

Abstract

Oxide semiconductors (OSs), introduced by the Hosono group in the early 2000s, have evolved from display backplane materials to promising candidates for advanced memory and logic devices. The exceptionally low leakage current of OSs and compatibility with three-dimensional (3D) architectures have recently sparked renewed interest in their use in semiconductor applications. This review begins by exploring the unique material properties of OSs, which fundamentally originate from their distinct electronic band structure. Subsequently, we focus on atomic layer deposition (ALD), a core technique for growing excellent OS films, covering both basic and advanced processes compatible with 3D scaling. The basic surface reaction mechanisms—adsorption and reaction—and their roles in film growth are introduced. Furthermore, material design strategies, such as cation selection, crystallinity control, anion doping, and heterostructure engineering, are discussed. We also highlight challenges in memory applications, including contact resistance, hydrogen instability, and lack of p-type materials, and discuss the feasibility of ALD-grown OSs as potential solutions. Lastly, we provide an outlook on the role of ALD-grown OSs in memory technologies. This review bridges material fundamentals and device-level requirements, offering a comprehensive perspective on the potential of ALD-driven OSs for next-generation semiconductor memory devices.

1. Introduction

Advances in modern memory and logic technologies have been driven by continuous scaling down of silicon-based devices. However, this progress is now facing physical limitations of device miniaturization and material limitations related to power consumption [1–4]. Consequently, the need for next-generation channel materials has become increasingly critical. Oxide semiconductors (OSs), well-known in the display industry for their excellent electrical properties and process compatibility, are now attracting growing interest in memory and logic applications [5–7]. Early research focused on their application in back-end-of-line (BEOL) logic technologies, given their capability for deposition on three-dimensional (3D) structures and low-temperature (below 400 °C) processing [8–10]. Recently, OSs have emerged as promising candidates for next-generation memory technologies, driven by demands for reduced cell size, increased transistor density, and vertical channel architectures to enhance integration density [11–13]. The low power consumption of these frameworks renders them especially attractive in dynamic random-access memory (DRAM) applications, where high leakage currents necessitate continuous dynamic refresh operations, leading to significant power consumption [12, 14]. In response to these industrial demands, extensive research is underway for the practical implementation of OS-based devices.

The idea of OSs as next-generation channel materials was first proposed by the Hosono group in 2003 through the demonstration of crystalline InGaZnO (IGZO; light red region in Fig. 1). Specifically, single-crystalline IGZO was synthesized via pulsed laser deposition (PLD) followed by annealing at 1400 °C. When used as the active layer in a thin-film transistor (TFT), the material exhibited a high field-effect mobility of approximately 80 cm² V⁻¹ s⁻¹ [15]. In 2004, the same group demonstrated the potential of OSs for next-generation displays by fabricating amorphous IGZO (a-IGZO) TFTs on polyethylene terephthalate substrates at room temperature (RT) using PLD and validating their transfer characteristics [16]. Since Hosono’s introduction of a-IGZO, OSs have attracted growing interest in next-generation displays due to their low off-state current, high mobility, and ...