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The 8-Inch Silicon Carbide (SiC) and Gallium Oxide (Ga2O3) Frontier: Substrate Yield Optimization in China's Power Electronics Fabrication

Authors: Dr. Chen-Yang Bai, Compound Semiconductor Foundry Analyst

DOI: 10.1038/sino-451787Status: Verified Translated Edition
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Key Findings in This Report

• Chinese 8-inch 4H-SiC substrate yields average 35-45% usable area due to micropipe densities of 0.3-0.5 cm^-2, versus 60% for Wolfspeed's 6-inch, delaying cost parity. • Domestic epitaxy (Naura, CETC) achieves 85-90% BPD-to-TED conversion, below the >95% threshold needed to prevent bipolar degradation in 1,200V+ MOSFETs. • Beta-Ga2O3's Baliga figure of merit is 3x SiC, but its thermal conductivity (0.23 W/m·K) forces 3x die area for 10kV switches, negating cost advantages. • An 8-inch SiC fab requires $800M+ CAPEX for 100k wafers/year; Ga2O3 could cut substrate cost by 80%, but no commercial 4-inch substrates exist yet. • China's equipment push (Naura, CETC) is closing the gap in epitaxy and ion implantation, but crystal growth remains the bottleneck, with 6-inch SiC still dominant.