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Synergistic performance and yield improvement of embedded RRAM product through process optimization in 40 nm CMOS platform

Authors: SUI Zhenchao; WU Yanqing; LV Zhichao; ZHANG Xing

DOI: 10.1088/1674-4926/25100021Status: Verified Translated Edition
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Key Findings in This Report

• Process optimizations in film sputtering and pre-deposition treatment improved within-wafer resistance uniformity from 11% to 8% and reduced inter-wafer variation from 23% to below 6%. • The yield of 8 Mb embedded RRAM products increased from 87% to 98.5% through systematic process improvements. • The RRAM achieved a fast read speed of 4.8 ns, read disturb immunity of 3×10^8 cycles at 95°C, endurance of 10^3 cycles for 1 Mb cells, and data retention of 12.5 years at 125°C. • Post-HTOL testing confirmed stable high/low resistance window, validating the reliability assurance framework for mass production.
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