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Official PDF TranslationJournal of Semiconductors (半导体学报 - 中国科学院半导体研究所)

Progress and Trends of Low-Jitter Fractional-N Phase-Locked Loops

Authors: Jun Yin; Haoran Li; Xiaoqi Lin; Rui P. Martins; Pui-In Mak

DOI: 10.1088/1674-4926/25040035Status: Verified Translated Edition
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Key Findings in This Report

• Fractional-N PLLs face jitter degradation from quantization error (Q-error), which induces quantization noise and fractional spurs, especially with wide loop bandwidths. • PFD-CP PLLs with offset PFD-CP and MASH DSM achieve low jitter but require large CP currents and loop filter capacitors, limiting power efficiency. • Multipath feedback technology compensates Q-error in the charge domain, reducing quantization noise and enabling high FoM with a dual-core class-F-1 VCO. • High-gain sampling PDs (e.g., sub-sampling PD) allow small CP currents and compact loop filters, but require DTC/DAC linearization to suppress spurs and noise folding.
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