• A high-density array of orderly silicon nanowires (SiNWs) was grown in precise locations, with diameter of DNW = 22.4 ± 2.4 nm and interwire spacing of 90 nm.
• A special suspension-contact protocol has been developed to reliably suspend the in-plane solid-liquid-solid SiNWs to serve as ultrathin quasi-1D channels for gate-all-around field-effect transistors (GAA-FETs).
• By optimizing the source/drain metal contacts, high-performance catalytical GAA-FETs have been successfully demonstrated, achieving a high on/off current ratio of 10^7 and a steep subthreshold swing of 66 mV dec−1.
• The results indicate that catalytic IPSLS SiNWs can serve as ideal 1D channels for scalable fabrication of high-performance GAA-FETs, well suited for monolithic 3D integrations.