From software-defined interconnect to software-defined system-on-wafer: a computing architecture revolution in the post-Moore era

• SDSoW achieves approximately 3.73×–4.39× higher throughput, 79.2% lower latency, and 2.8× higher power efficiency compared to conventional multi-chip systems. • The architecture enables wafer-level heterogeneous integration with dynamic reconfiguration of thousands of computing chiplets across an entire wafer. • The application-driven dynamic architecture reconfiguration (ADR) paradigm optimizes wafer-scale resources in real time and may foster emergent intelligence in large heterogeneous systems. • This paradigm shift offers a viable pathway beyond Moore’s law via innovative architectural design rather than process scaling.