SinoTechIntel Academic Portal
Official PDF TranslationNano-Micro Letters

A Valuable and Low-Budget Process Scheme of Equivalized 1 nm Technology Node Based on 2D Materials

Authors: Yang Shen; Zhejia Zhang; Zhujun Yao; Mengge Jin; Jintian Gao; Yuhan Zhao; Wenzhong Bao; Yabin Sun; He Tian

DOI: 10.1007/s40820-025-01702-7Status: Verified Translated Edition
Sponsored AdvertisementAd Placement Area
reCAPTCHA Bot Shield Active

Preparing Secure Academic Download

Verifying human reader & generating high-resolution document...

Verifying Document Integrity15s remaining
← Back to Article
Protected by Google reCAPTCHA v3.PrivacyTerms
Sponsored ContentAdSense In-Feed Ad Slot

Key Findings in This Report

• A set of MoS2 nanosheet field-effect transistors (NSFETs) are fabricated, with two stacking nanosheet channel, in which two parallel MoS2 channels are controlled by three gate electrodes simultaneously. • By building a comprehensive framework, the feasibility of replacing silicon-based complementary field-effect transistors of 1 nm node with 2D-NSFETs provides a 2D technology solution for 1 nm nodes, i.e., "2D eq 1 nm" nodes are verified. • The horizontally miniaturized 2D-NSFET achieves a frequency increase of 28% at a fixed power consumption and also obtains a similar trend in 16-bit RISC-V CPU. • The ultra-scaled 2D-NSFET improves frequency by 36% at a fixed power consumption compared to Si-CFET with the same average device footprint, demonstrating potential for low-cost, high-performance next-generation transistors.
Download Full PDF: A Valuable and Low-Budget Process Scheme of Equivalized 1 nm Technology Node Based on 2D Materials | SinoTechIntel | SinoTechIntel